Quantcast
Channel: Cadence System Design and Verification Forum
Browsing all 276 articles
Browse latest View live

Image may be NSFW.
Clik here to view.

Regarding Coverage excluding a module

Hi i am MohanI am running, coverage report,, when i it is completed and the coverage report is showing covering all modules.But i don't need some of modules to be covered which this i can improve...

View Article


Image may be NSFW.
Clik here to view.

Limits on CSV export of traces?

I ran a parametric sweep with 3 global variables 300 steps total each a dc sweep. When I select all traces in graph and export to csv it only saves 52x150 or about 50 dc sweeps of 75 parametrically...

View Article


Image may be NSFW.
Clik here to view.

HOWTO - CtoS - Identify Write Ops(Specify Micro-architecture) in Source Code?

Hi all,I'm currently in the process of refining a design code with regard to Specify Micro-architecture.The design code is relatively complex and according to "Specify Micro-architecture" certain...

View Article

Image may be NSFW.
Clik here to view.

Help needed for generating random signals in cadence analog lib

hello,i am currently doing a project and i am stuck with random signal generation. if any one could help me i would be really thankful to you ..please 

View Article

Image may be NSFW.
Clik here to view.

Multiple Design Available -Cadence Compiler Error!

Hi.. Am using cadence to synthesise my design...I'm getting the following error...''Error : Multiple designs are available. Specify the design you want to use. [TUI-17] [define_clock]: There is no...

View Article


Image may be NSFW.
Clik here to view.

How to plot current versus voltage curve in waveform graph XL with cadence 6.1.4

Hello !I need to plot a current versus voltage curve (with Waveform Graph XL version Thu Dec 2 23:00:39) after running a transient simulation with cadence version IC6.1.4.500.10I don't find the way to...

View Article

Image may be NSFW.
Clik here to view.

DC sweep

I am running DC sweep analyses with current on X-axis & voltage on Y-axis, but i want to sweep the frequency as well. that is i want curves for various frequencies within a V vs I curve, how do i...

View Article

Image may be NSFW.
Clik here to view.

Pspice Advanced : SMOKE. Different smoke limits per Model

Hi, I start with the smoke analysis and I do not manage to create 2 resitances with different properties.I am used to add Rbreakout resistors and to Edit the Pspice Model in order to give them...

View Article


Image may be NSFW.
Clik here to view.

Pspice encrypted model doesn't work but the non-encrypted model works fine

Hi, I am testing the encyption feature of the Pspice model editor with a simple subckt model. I put the non-encrypted model file in one directory, and the encrypted model file in the other. Both have...

View Article


Image may be NSFW.
Clik here to view.

Error voltage failed to converge

Hello. I'm doing a simulation with Capture and it is aborted showing the next message: These supply currents failed to converge:    I(X_U7.L_L2)              =   -1.70575e-006 / -1.15349e-006...

View Article

Image may be NSFW.
Clik here to view.

How to automatically sort/rename parts in schematic?

Hello everyone!I am new here, so if this isn't the right section to ask, I'm sorry, just correct me. I am using Orcad Capture and PSPICE to simulate circuits for my school project. Because of frequent...

View Article

Image may be NSFW.
Clik here to view.

Error when copying cells or libraries in the library manager: DFIIChecker /...

 Hi everyone! I'm new here, so if this isn't the right section to ask, I'm sorry, just correct me. I've installed IC 6.1.5 with HF132 on RHEL5. When I want to copy a library or a cell in the library...

View Article

Image may be NSFW.
Clik here to view.

Fixed step size

Good day evryonecan you told me how to simulate with a fixed the step size  ?in my simulation i use the MOSFET commutation and with maximum step size ORCAD variate the step size in commutation. But i...

View Article


Image may be NSFW.
Clik here to view.

leakage power

 How to find Leakage Power in cadence analog design environment?

View Article

Image may be NSFW.
Clik here to view.

Modeling languages and rad hardened cell libraries for ARM processors

Dear Sirs,My company is considering ARM processors, in particular the A15 or even AXM5512-B or AXM5516-B, for a certain project that we are evaluating.Key Project Requirements1. General Processing...

View Article


Image may be NSFW.
Clik here to view.

Read Orcad Data?

I have been tasked with integrating Orcad with an ERP database.  The ERP database is a SQL Server database and I have no problems writing to it. However I am clueless on where to go to read Orcad data....

View Article

Image may be NSFW.
Clik here to view.

Regarding symbol attributes display

Hi,In the schematics the symbol attributes have value field "<<null>>" when we have not provided any value for the particular header in the part table. Is there a way to make the value...

View Article


Image may be NSFW.
Clik here to view.

Regarding: symbol property 'has_fixed_size'

Hi,I am using CONCEPT HDL version 16.5. When i define the property 'has_fixed_size' in the symbol property, an error message is displayed suggesting that 'has_fixed_size' is a reserved property and...

View Article

Image may be NSFW.
Clik here to view.

Regarding: reference designator

Is LOCATION a default properrty in CONCEPT HDL for reference designator or can the property be disabled or renamed with another name. Because even if the property LOCATION is not defined the it shows...

View Article

Image may be NSFW.
Clik here to view.

einfostreet Publishes latest technology news, media, lifestyle news

einfostreet.com Publishes latest technology, news, media, lifestyle news, product launching news, many more information you will see on this blog.eInfoStreet is one of the leading software and...

View Article
Browsing all 276 articles
Browse latest View live


Latest Images